Beschreibung
InhaltsangabeTutorial I: The 15 Minute Design.- The Altera UP 3 Board.- Programmable Logic Technology.- Tutorial II: Sequential Design and Hierarchy.- UP3core Library Functions.- Using VHDL for Synthesis of Digital Hardware. Using Verilog for Synthesis of Digital Hardware.- State Machine Design: The Electric Train Controller.- A Simple Computer Design: The µP 3.- VGA Video Display Generation.- Interfacing to the PS/2 Keyboard and Mouse.- Legacy Digital I/O Interfacing Standards.- UP3 Robotics Projects.- A RISC Design: Synthesis of the MIPS Processor Core.- Introducing System-on-a-Programmable Chip.- Tutorial III: NIOS II Processor Software Development.- Tutorial IV: NIOS II Processor Hardware Design.- Appendix A: Generation of Pseudo Random Binary Sequences.- Appendix B: Quartus II Design and Data File Extensions.- Appendix C: UP 3 Pin Assignments.- Appendix D: ASCII Character Code.- Appendix E: Programming the UP 3's Flash Memory.
Inhaltsverzeichnis
Tutorial I: The 15 Minute Design.- The Altera UP 3 Board.- Programmable Logic Technology.- Tutorial II: Sequential Design and Hierarchy.- UP3core Library Functions.- Using VHDL for Synthesis of Digital Hardware. Using Verilog for Synthesis of Digital Hardware.- State Machine Design: The Electric Train Controller.- A Simple Computer Design: The µP 3.- VGA Video Display Generation.- Interfacing to the PS/2 Keyboard and Mouse.- Legacy Digital I/O Interfacing Standards.- UP3 Robotics Projects.- A RISC Design: Synthesis of the MIPS Processor Core.- Introducing System-on-a-Programmable Chip.- Tutorial III: NIOS II Processor Software Development.- Tutorial IV: NIOS II Processor Hardware Design.- Appendix A: Generation of Pseudo Random Binary Sequences.- Appendix B: Quartus II Design and Data File Extensions.- Appendix C: UP 3 Pin Assignments.- Appendix D: ASCII Character Code.- Appendix E: Programming the UP 3''s Flash Memory.
