Beschreibung
The modern computing problems call for versatile digital circuits that are power efficient and high performance. The skewed logic style used in the logic gates, which came into use a few years ago, can be utilized in pipeline structures to enhance the performance. The Skewed logic is intermediate between the static and the dynamic logic, and has the advantages of both the logic styles. This means that the delay will be lesser than the static logic, but the speed will be higher, and the opposite case for the dynamic logic. In this work, such skewing is done in a pipeline and energy is saved in the circuit. The energy consumed is compared with the dynamic logic, and the static logic, and is found to be better.
Autorenporträt
Dr. Ashwani Rana,Ph.D,studied at IIT Roorkee,Associate Professor in E&CE Department at NIT Hamirpur, India. His research interest includes modeling of semiconductor devices,VLSI circuit design and emerging integrated circuit technologies. He has more than 50 publications in Journal & Conferences.He has guided Ph.D and M.Tech students in these areas
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