Beschreibung
MGDI technique, in which a low number of transistors are used to reduce the power consumption and area on chip of digital circuits. In this paper the full adder is introduced using MGDI technique. 2 bit comparator, full subtractor were introduced using GDI technique. Then these digital circuits were compared with traditional CMOS transistors in terms of power dissipation, number of transistors, area, speed and delay.
Autorenporträt
I am Priyanka Sharma. I have completed M.tech in VLSI design, currently working as an Assistant professor in Poornima Group.I have published more than 20 research papers in national and international journals. I have a six year experience of teaching. My research area is microprocessor, digital electronics and VLSI design.
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BoD - Books on Demand
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