Produktbild: Memory-Based Logic Synthesis

Memory-Based Logic Synthesis

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106,99 €

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ISBN: 1489991530
ISBN 13: 9781489991539
Autor: Sasao, Tsutomu
Verlag: Springer Verlag GmbH
Umfang: xii, 189 S.
Erscheinungsdatum: 28.09.2014
Auflage: 1/2014
Produktform: Kartoniert
Einband: Kartoniert

This book describes the synthesis of logic functions using memories. It is useful to design field programmable gate arrays (FPGAs) that contain both small-scale memories, called look-up tables (LUTs), and medium-scale memories, called embedded memories.  This is a valuable reference for both FPGA system designers and CAD tool developers, concerned with logic synthesis for FPGAs.  Anyone using logic gates to design logic circuits, you can benefit from the methods described in this book.  – Describes in detail the synthesis of logic functions using memories;  Introduces a lookup tables (LUT) cascade as a new architecture for logic synthesis;  Shows logic design methods for index generation functions;  Introduces Cmeasure, which specifies the complexity of Boolean functions;  Introduces hashbased design methods, which efficiently synthesize index generation functions by pairs of smaller memories and can be applied to IP address tables, packet filtering, terminal access controllers, memory patch circuits, virus scanning circuits, intrusion detection circuits, fault map of memories, code converters and pattern matching.  

Artikelnummer: 7805757 Kategorie:

Beschreibung

This book describes the synthesis of logic functions using memories. It is useful to design field programmable gate arrays (FPGAs) that contain both small-scale memories, called look-up tables (LUTs), and medium-scale memories, called embedded memories. This is a valuable reference for both FPGA system designers and CAD tool developers, concerned with logic synthesis for FPGAs.

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