Beschreibung
InhaltsangabeForeword. Preface. 1: Two-Level Logic Minimization; O. Coudert, T. Sasao. 2: Multi-Level Logic Optimization; M. Fujita, Y. Matsunaga, M. Ciesielski. 3: Flexibility in Logic; E. Sentovich, D. Brand. 4: Multiple-Valued Logic Synthesis and Optimization; E. Dubrovna. 5: Technology Mapping; L. Stok, V. Tiwari. 6: Technology-based Transformations; R. Murgai. 7: Logical and Physical Design: A Flow Perspective; O. Coudert. 8: Logic Synthesis for Low Power; L. Benini, G. de Micheli. 9: Optimization of Synchronous Circuits; S. Hassoun, T. Villa. 10: Asynchronous Control Circuits; L. Lavagno, S.M. Nowick. 11: Ordered Binary Decision Diagrams; R.E. Bryant, C. Meinel. 12: SAT and ATPG: Algorithms for Boolean Decision Problems; W. Kunz, J. Marques-Silva, S. Malik. 13: Combinatorial and Sequential Equivalence Checking; A. Kuehlmann, C.A.J. van Eijk. 14: Static Timing Analysis; Y. Kukimoto, M. Berkelaar, K. Sakallah. 15: The Future of Logic Synthesis and Verification; R.K. Brayton. Appendices: A: About the Authors. B: Author Contact Information. Index.
