Power Optimization in FPGA Routing circuits

Lieferzeit: Lieferbar innerhalb 14 Tagen

54,90 

ISBN: 6139896746
ISBN 13: 9786139896745
Autor: Muthusamy, Sundar Prakash Balaji/Subramaniam, Vijayan
Verlag: LAP LAMBERT Academic Publishing
Umfang: 96 S.
Erscheinungsdatum: 21.11.2018
Auflage: 1/2018
Format: 0.7 x 22 x 15
Gewicht: 161 g
Produktform: Kartoniert
Einband: Kartoniert
Artikelnummer: 6025907 Kategorie:

Beschreibung

The work optimizes power in 4T,5T,6T,7T,8T,9T and 10T SRAM by comparing their configurations. Two mode based operations are proposed: Mode I operation and Mode-II operation. A 10T based SRAM write driver circuitry is proposed and comparison of Static Power, Static Power Dissipation, Performance metrics like Power delay product and Energy delay product are compared using TANNER 7.0. In future, Adiabatic logic work circuitry has to be implemented and results are to be obtained.

Autorenporträt

Dr Sundar Prakash Balaji acquired Doctorate from Anna University, Chennai. He owns Bachelor's and Master's degrees from Anna University, Chennai. He is currently working as Associate Professor, RVS Technical Campus - Coimbatore. His area of interests are not but limited to Low power VLSI Design, ASIC Design and Solid state devices.

Herstellerkennzeichnung:


OmniScriptum SRL
Str. Armeneasca 28/1, office 1
2012 Chisinau
MD

E-Mail: info@omniscriptum.com

Das könnte Ihnen auch gefallen …