Beschreibung
To cope with the rapid pace of device scaling, the semiconductor industry demands multiple data to be stored in a single memory cell which eventually results in high capacity (data storage) miniaturized memory. In this work development of highly repeatable, forming free low voltage, low power resistive switching phenomenon in TiO2 based Metal-Insulator-Metal device structure. The presented thesis, mainly, deals with performance optimization of resistive random access memory towards reliable future generation memory application. Effect on resistive switching performance due to variationin TiO2 deposition method (i.e. electrochemical anodization and thermal oxidation), metal electrodes was experimented. In addition post annealing effect on device performance also studied. It is postulated from result obtained from experiment that device didnt annealed at high temperature (more than 600°C) and Au electrode gives better memory performance than alloy metal electrode, Pd-Ag. A highly repeatable multilevel resistive switching Au/TiO2/Ti memory device is fabricated in this work.
Autorenporträt
D. Acharyya received his B.Tech. degree in Electronics and Instrumentation Engineering from the West Bengal University of Technology, Kolkata, India M.E. degree in Digital System and Instrumentation from Bengal Engineering and Science University, Shibpur, Howrah, India in the year 2011 and 2013 respectively.
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