System-on-a-Chip Verification

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171,19 

Methodology and Techniques

ISBN: 0792372794
ISBN 13: 9780792372790
Autor: Rashinkar, Prakash/Paterson, Peter/Singh, Leena
Verlag: Springer Verlag GmbH
Umfang: xx, 372 S., 22 s/w Illustr., 372 p. 22 illus.
Erscheinungsdatum: 31.12.2000
Auflage: 1/2000
Produktform: Gebunden/Hardback
Einband: Gebunden
Artikelnummer: 1564431 Kategorie:

Beschreibung

System-On-a-Chip Verification: Methodology and Techniques is the first book to cover verification strategies and methodologies for SOC verification from system level verification to the design sign- off. The topics covered include Introduction to the SOC design and verification aspects, System level verification in brief, Block level verification, Analog/mixed signal simulation, Simulation, HW/SW Co-verification, Static netlist verification, Physical verification, and Design sign-off in brief. All the verification aspects are illustrated with a single reference design for Bluetooth application. SystemOnaChip Verification: Methodology and Techniques takes a systematic approach that covers the following aspects of verification strategy in each chapter: Explanation of the objective involved in performing verification after a given design step; Features of options available; When to use a particular option; How to select an option; and Limitations of the option. This exciting new book will be of interest to all designers and test professionals.

Herstellerkennzeichnung:


Springer Verlag GmbH
Tiergartenstr. 17
69121 Heidelberg
DE

E-Mail: juergen.hartmann@springer.com

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