Beschreibung
In this work the low power Gain Boosted Recycling Folded Cascode Operational Transconductance Amplifier (GB-RFC OTA) is designed and analyzed using 130nm CMOS technology. The design of the circuit is made schematically using design entry tool. Tanner Schematic Editor(S-Edit) is used for design entry. The generated net-list is simulated using T-Spice.For functional verification of the OTA circuits;DC, AC, transient analysis have been carried out. The proposed design is based on Recycling Folded Cascode topology.The recycling folded cascode OTA increases the effective transconductance of FC-OTA which further enhance the other performance parameters such as Gain, GBW and speed of amplifier within same area and power budget.The additional cascode Gain stage is used to increase the gain of the design by enhancing its output impedance. The different compensation techniques are discussed and Single Miller Capacitor Nulling Resistor is used as compensation circuitry in order to achieve the significant Phase Margin. The small compensation capacitor (Cc) of 3pf is used, which also improves the slew rate.The proposed design operates on 1V Power supply and consumes a power of 700µW.
Autorenporträt
Sanjeev Sharma is Assistant Professor of Electronics and Communication Engineering at Lovely Professional University,Punjab, India. He received his B.Tech degree in ECE from Punjab Technical University, India in 2010 and his M.Tech in ECE from Lovely professional University,India 2013. His main research areas are VLSI and low power analog designs.
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