Beschreibung
Autorenporträt
Dr. M C Bhuvaneswari received her B.E. degree in Electronics and Communication Engineering from the Government College of Technology, Coimbatore, in 1985; M.E. degree in Applied Electronics in 1989 and Ph.D. degree in the area of Very Large Scale Integration (VLSI) testing in 2002 from PSG College of Technology, Coimbatore. She is currently an associate professor at the Department of Electrical and Electronics Engineering at the same college. Her research interests include VLSI testing, VLSI CAD, embedded system design, evolutionary algorithms and multi-objective optimization. She has published 65 papers on these topics in journals and conferences. She has 26 years of teaching experience and was the recipient of the 2010 Dakshinamoorthy Award for Teaching Excellence, instituted by PSG College of Technology. Dr. Jayashree Saxena received her Ph.D in Electrical and Computer Engineering from the University of Massachusetts, Amherst in 1993. She is currently a business unit manager at Anora LLC in Plano, Texas where she is responsible for design-for-test (DFT) services. Prior to that, she worked at Texas Instruments, Dallas from 1993 to 2013, where she served in various roles ranging from management to technical leadership in the DFT area. She received the most Significant Paper award at the International Test Conference (ITC) 2013 for the ITC 2003 paper "A Case-study of IR drop in Structured At-Speed Testing". She also served on the Technical Program Committee of ITC from 2005 to 2013.
