Beschreibung
InhaltsangabeList of abbreviations. List of symbols. Preface. 1. Introduction. 1.1 A/D conversion systems. 1.2 Motivation and objectives. 1.3 Layout of the book. 2. Accuracy, speed and power relation. 2.1 Introduction. 2.2 IC-technology accuracy limitations. 2.3 Speed and power. 2.4 Maximum speed. 2.5 CMOS Technology Trends. 2.6 Conclusions. 3. A/D converter architecture comparison. 3.1 Introduction. 3.2 Flash. 3.3 Folding and interpolation. 3.4 Two-step. 3.5 Pipe-line. 3.6 Successive approximation. 3.7 Theoretical power consumption comparison. 3.8 Conclusions. 4. Enhancement techniques for two-step A/D converters. 4.1 Introduction. 4.2 Error sources in a two-step A/D architecture. 4.3 Residue gain in two-step A/D converters. 4.4 Offset calibration. 4.5 Mixed-signal chopping and calibration. 5. A 10-bit two-step ADC with analog online calibration. 5.1 Introduction. 5.2 Two-step architecture. 5.3 Circuit design. 5.4 Experimental results. 5.5 Discussion. 5.6 Conclusions. 6. A 12-bit two-step ADC with mixed-signal chopping and calibration. 6.1 Introduction. 6.2 Two-step architecture. 6.3 Mixed-signal chopping and calibration. 6.4 Circuit design. 6.5 Experimental results. 6.6 Discussion. 6.7 Conclusions. 7. A low-power 16-bit three-step ADC for imaging applications. 7.1 Introduction. 7.2 Three-step architecture. 7.3 Noise considerations. 7.4 Mixed-signal chopping and calibration. 7.5 Supply voltages. 7.6 Experimental results. 7.7 Discussion. 7.8 Conclusions. 8. Conclusions. A. Static and dynamic accuracy requirements. References. Index.
Inhaltsverzeichnis
List of abbreviations. List of symbols. Preface. 1. Introduction. 1.1 A/D conversion systems. 1.2 Motivation and objectives. 1.3 Layout of the book. 2. Accuracy, speed and power relation. 2.1 Introduction. 2.2 IC-technology accuracy limitations. 2.3 Speed and power. 2.4 Maximum speed. 2.5 CMOS Technology Trends. 2.6 Conclusions. 3. A/D converter architecture comparison. 3.1 Introduction. 3.2 Flash. 3.3 Folding and interpolation. 3.4 Two-step. 3.5 Pipe-line. 3.6 Successive approximation. 3.7 Theoretical power consumption comparison. 3.8 Conclusions. 4. Enhancement techniques for two-step A/D converters. 4.1 Introduction. 4.2 Error sources in a two-step A/D architecture. 4.3 Residue gain in two-step A/D converters. 4.4 Offset calibration. 4.5 Mixed-signal chopping and calibration. 5. A 10-bit two-step ADC with analog online calibration. 5.1 Introduction. 5.2 Two-step architecture. 5.3 Circuit design. 5.4 Experimental results. 5.5 Discussion. 5.6 Conclusions. 6. A 12-bit two-step ADC with mixed-signal chopping and calibration. 6.1 Introduction. 6.2 Two-step architecture. 6.3 Mixed-signal chopping and calibration. 6.4 Circuit design. 6.5 Experimental results. 6.6 Discussion. 6.7 Conclusions. 7. A low-power 16-bit three-step ADC for imaging applications. 7.1 Introduction. 7.2 Three-step architecture. 7.3 Noise considerations. 7.4 Mixed-signal chopping and calibration. 7.5 Supply voltages. 7.6 Experimental results. 7.7 Discussion. 7.8 Conclusions. 8. Conclusions. A. Static and dynamic accuracy requirements. References. Index.