Beschreibung
This book contains the papers presented at the 14th International Conference onFieldProgrammableLogicandApplications(FPL)heldduringAugust30th- September 1st 2004. The conference was hosted by the Interuniversity Micro- Electronics Center (IMEC) in Leuven, Belgium. The FPL series of conferences was founded in 1991 at Oxford University (UK), and has been held annually since: in Oxford (3 times), Vienna, Prague, Darmstadt, London, Tallinn, Glasgow, Villach, Belfast, Montpellier and Lisbon. It is the largest and oldest conference in recon?gurable computing and brings together academic researchers, industry experts, users and newcomers in an - formal,welcomingatmospherethatencouragesproductiveexchangeofideasand knowledge between the delegates. The fast and exciting advances in ?eld programmable logic are increasing steadily with more and more application potential and need. New ground has been broken in architectures, design techniques, (partial) run-time recon?gu- tion and applications of ?eld programmable devices in several di?erent areas. Many of these recent innovations are reported in this volume. The size of the FPL conferences has grown signi?cantly over the years. FPL in 2003 saw 216 papers submitted. The interest and support for FPL in the programmable logic community continued this year with 285 scienti?c papers submitted, demonstrating a 32% increase when compared to the year before. The technical program was assembled from 78 selected regular papers, 45 - ditional short papers and 29 posters, resulting in this volume of proceedings. The program also included three invited plenary keynote presentations from Xilinx,GilderTechnologyReportandAltera,andthreeembeddedtutorialsfrom Xilinx, the Universit¨ at Karlsruhe (TH) and the University of Oslo.
Autorenporträt
InhaltsangabePlenary Keynotes.- FPGAs and the Era of Field Programmability.- Reconfigurable Systems Emerge.- System-Level Design Tools Can Provide Low Cost Solutions in FPGAs: TRUE or FALSE?.- Organic and Biology Computing.- Hardware Accelerated Novel Protein Identification.- Large Scale Protein Sequence Alignment Using FPGA Reprogrammable Logic Devices.- Security and Cryptography 1.- A Key Management Architecture for Securing Off-Chip Data Transfers.- FPGA Implementation of Biometric Authentication System Based on Hand Geometry.- Platform Based Design.- SoftSONIC: A Customisable Modular Platform for Video Applications.- Deploying Hardware Platforms for SoC Validation: An Industrial Case Study.- Algorithms and Architectures.- Algorithms and Architectures for Use in FPGA Implementations of Identity Based Encryption Schemes.- Power Analysis Attacks Against FPGA Implementations of the DES.- Acceleration Application 1.- Monte Carlo Radiative Heat Transfer Simulation on a Reconfigurable Computer.- Stochastic Simulation for Biochemical Reactions on FPGA.- Architecture 1.- Dynamic Adaptive Runtime Routing Techniques in Multigrain Reconfigurable Hardware Architectures.- Interconnecting Heterogeneous Nodes in an Adaptive Computing Machine.- Improving FPGA Performance and Area Using an Adaptive Logic Module.- A Dual-V DD Low Power FPGA Architecture.- Physical Design 1.- Simultaneous Timing Driven Clustering and Placement for FPGAs.- Run-Time-Conscious Automatic Timing-Driven FPGA Layout Synthesis.- Compact Buffered Routing Architecture.- On Optimal Irregular Switch Box Designs.- Arithmetic 1.- Dual Fixed-Point: An Efficient Alternative to Floating-Point Computation.- Comparative Study of SRT-Dividers in FPGA.- Second Order Function Approximation Using a Single Multiplication on FPGAs.- Efficient Modular Division Implementation.- Multitasking.- A Low Fragmentation Heuristic for Task Placement in 2D RTR HW Management.- The Partition into Hypercontexts Problem for Hyperreconfigurable Architectures.- Circuit Technology.- A High-Density Optically Reconfigurable Gate Array Using Dynamic Method.- Evolvable Hardware for Signal Separation and Noise Cancellation Using Analog Reconfigurable Device.- Memory 1.- Implementing High-Speed Double-Data Rate (DDR) SDRAM Controllers on FPGA.- Logic Modules with Shared SRAM Tables for Field-Programmable Gate Arrays.- Network Processing.- A Modular System for FPGA-Based TCP Flow Processing in High-Speed Networks.- Automatic Synthesis of Efficient Intrusion Detection Systems on FPGAs.- Testing.- BIST Based Interconnect Fault Location for FPGAs.- FPGAs BIST Evaluation.- Applications.- Solving SAT with a Context-Switching Virtual Clause Pipeline and an FPGA Embedded Processor.- Evaluating Fault Emulation on FPGA.- Arithmetic 2.- Automating Optimized Table-with-Polynomial Function Evaluation for FPGAs.- Multiple Restricted Multiplication.- Signal Processing 1.- Area*Time Optimized Hogenauer Channelizer Design Using FPL Devices.- A Steerable Complex Wavelet Construction and Its Implementation on FPGA.- Computational Models and Compiler.- Programmable Logic Has More Computational Power than Fixed Logic.- JHDLBits: The Merging of Two Worlds.- A System Level Resource Estimation Tool for FPGAs.- The PowerPC Backend Molen Compiler.- Dynamic Reconfiguration 1.- An Integrated Online Scheduling and Placement Methodology.- On-Demand FPGA Run-Time System for Dynamical Reconfiguration with Adaptive Priorities.- Techniques for Virtual Hardware on a Dynamically Reconfigurable Processor - An Approach to Tough Cases -.- Throughput and Reconfiguration Time Trade-Offs: From Static to Dynamic Reconfiguration in Dedicated Image Filters.- Network and Optimization Algorithms.- Over 10Gbps String Matching Mechanism for Multi-stream Packet Scanning Systems.- Hardware Design of a FPGA-Based Synchronizer for Hiperlan/2.- Three-Dimensional Dynamic Programming for Homology Search.- An Instance-Specific Hardware Algorithm for Finding a Maximum Clique.-
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