Digital VLSI Chip Design with Cadence and Synopsys CAD Tools

Lieferzeit: Lieferbar innerhalb 14 Tagen

88,99 

ISBN: 0321547993
ISBN 13: 9780321547996
Autor: Weste, Neil/Weste, Neil H E/Harris, David Money
Verlag: Pearson Verlag
Umfang: 600 S.
Erscheinungsdatum: 10.10.2024
Auflage: 1/2024
Gewicht: 721 g
Produktform: Kartoniert
Einband: Kartoniert

KEY BENEFIT : This handson book leads readers through the complete process of building a readytofabricate CMOS integrated circuit using popular commercial design software. KEY TOPICS : The VLSI CAD flow described in this book uses tools from two vendors: Cadence Design Systems, Inc. and Synopsys Inc. Detailed tutorials include step-by-step instructions and screen shots of tool windows and dialog boxes. MARKET : A useful reference for chip designers.

Artikelnummer: 9984346 Kategorie:

Beschreibung

Autorenporträt

Professor Erik Brunvand is an associate professor in the School of Computing at the University of Utah. He has interests in computer architecture and VLSI systems in general, and self-timed and asynchronous systems in particular. One aspect of his research involves compiling concurrent communicating programs into asynchronous VLSI circuits. The current system allows programs written in a subset of occam, a concurrent message-passing programming language based on CSP, to be automatically compiled into a set of self-timed circuit modules suitable for manufacture as an integrated circuit. He is also interested in investigating the effects of asynchrony on computer systems architecture at a higher level. To explore these ideas he is building a series of prototype asynchronous computer systems out of FPGA and custom VLSI chips.

Herstellerkennzeichnung:


Pearson Studium im Verlag Pearson Benelux B.V. Zweigniederla
Sankt-Martin-Straße 82
81541 München
DE

E-Mail: buchhandel@pearson.com

Das könnte Ihnen auch gefallen …