Beschreibung
The Logical Execution Time (LET) enables time and data flow determinism of embedded applications. The resource efficient integration of LET into automotive embedded systems requires buffering and scheduling design techniques. A buffering mechanism and an automatic schedule synthesis are proposed to guarantee functional correctness, timing requirements, LET semantics and to reduce the increased demands of LET for memory and processor resources. A static and global buffering protocol is proposed that requires plausible memory needs and causes zero-communication overheads at the boundaries of LET intervals. Scheduling synthesis algorithms are proposed for two scheduling mechanisms to automatically construct the schedule of tasks to execute within their LETs. Two mechanisms are considered to determine the efficiency, practicality, and resource optimization capabilities of each approach for LET systems. The overheads of the operating system (OS) are considered to optimize the schedule regarding preemption overheads. The practicality of LET for industrial automotive systems is shown for the classic AUTomotive Open System Architecture (AUTOSAR) with a case study on a real system. 73854098714LangtextIndividuelle Kartenrückseite Neu eingefärbte Bildkarten von Schlangen mit inspirierten Texturen Einstecketui mit Goldfolien-Akzenten LuftkissenFinish
Herstellerkennzeichnung:
Universitätsverlag Regensburg GmbH
Leibnitzstr. 13
93055 Regensburg
DE
E-Mail: w.koralus@univerlag-regensburg.de
