Requirements of Low Power VLSI Design and Analysis of Flip-flops

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Sources of Power Consumption

ISBN: 3330041080
ISBN 13: 9783330041080
Autor: Khan, Imran
Verlag: LAP LAMBERT Academic Publishing
Umfang: 76 S.
Erscheinungsdatum: 25.02.2017
Auflage: 1/2017
Format: 0.5 x 22 x 15
Gewicht: 131 g
Produktform: Kartoniert
Einband: KT
Artikelnummer: 2082787 Kategorie:

Beschreibung

In recent years, power consumption has become a critical design concern due to the growing demand of portable applications and the increasing costs incurred and difficulties encountered in cooling and heat removal processes. Flip-flops are heavily studied circuits, as they have a large impact on both cycle time and power consumption in modern synchronous systems. In many digital VLSI designs, the clock system that includes clock distribution network and flip-flops is one of the highest power consuming component. Therefore, flip-flops should be designed to consume minimum power, while not compromising on area, delay and reliability. This book begins with the basic background information about power consumption and significance of low power design. Different types of power consumption are also discussed. Different state-of-the-art master slave Single edge triggered flip-flops (SETFFs) are reviewed and implemented on TSPICE using BSIM models. The nominal simulation conditions, along with analysis and optimization performed during simulation, are discussed. In this book, simulation results of flip-flops are compared.

Autorenporträt

Dr. Imran Ahmed Khan received his Ph.D. degree from Jamia Millia Islamia (Central University), India in Electronics in 2015. He is currently working as an Assistant Professor in AKTU, Lucknow. He has published many research papers in international Journals (including SCI/ISI) and international conferences.

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